Nvidia asks SK Hynix to bring forward HBM4 supply by 6 months

Nvidia Corp.’s Chief Executive Jensen Huang has asked SK Group Chairman Chey Tae-won to supply 12-layer HBM4 chips, the most advanced AI chips available, six months earlier than SK's schedule of early 2026, Chey said on Monday.

“When I met Jensen Huang, he asked to bring forward the supply of HBM4 by six months,” he said in a keynote speech at the SK AI Summit 2024.

“And I looked at SK Hynix CEO Kwak Noh-jung and asked if it’s possible. He said he will try his best [to meet the request]."

SK Hynix had planned to deliver 12-layer HBM4 to Nvidia, the world's largest AI chip designer, in the first half of 2026, about one year after launching the 16-layer HBM3E products.

Chey did not elaborate further on his recent meeting with Huang.

“Based on our simulation results, the 16-layer [HBM3E] products showed 18% improvement in learning performance and 32% improvement in inference performance compared with the 12-layer HBM3E chips,” said SK Hynix CEO Kwak during SK Group’s annual AI summit.

Currently, the 12-layer HBM3E is its most advanced AI chip. SK Hynix mass-produced the products last month for the first time in the industry, for shipment later this year.

In March, SK Hynix became the industry’s first supplier of eight-layer HBM3E to Nvidia.
 

COLLABORATING WITH TSMC ON HBM4

The world’s No. 2 memory chipmaker has been cementing its top spot in the HBM market, ahead of Samsung Electronics Co., the memory chip leader.

To develop HBM4 models, SK Hynix has teamed up with TSMC, the world’s No. 1 chip foundry.

Kwak said it will adopt TSMC’s advanced logic process for HBM4’s base die. SK Hynix has used proprietary technology to make base dies up to HBM3E.

HBM is made by stacking a core DRAM die on top of a base die. The base die is connected to the GPU, which controls HBM chips.

SK Hynix is said to be preparing for the launch of HBM5 and HBM5E in 2028.

NEW BONDING TECHNOLOGY FOR 16-LAYER HBM3E 

For 16-layer HBM3E products, SK Hynix will apply advanced MR-MUF technology as it did for 12-layer HBM3 chips.

MR-MUF, which is used to attach semiconductor chips to circuits, reduces chip stacking pressure and cuts pressing time. SK Hynix is also developing hybrid bonding technology as a backup for MR-MUF, said Kwak.

NAND FLASH

In the NAND flash segment, SK Hynix is developing LPDDR5 and LPDDR6, using 1c, or 10 nm-class process technology, which it unveiled in August, according to Kwak.

LPDDR stands for low-power double data rate and is commonly used in mobile devices.

SOLID STATE DRIVES

It is also preparing to launch enterprise SSDs based on quad-level cells (QLC),

QLC refers to NAND flash with each storage cell capable of recording four bits. It allows for more data storage in the same space compared with other NAND flash chips.

Kwak's remarks came as SK Hynix is in talks with Tesla Inc. over the US electric vehicle giant’s request for a possible 1 trillion won ($725 million) order of eSSDs, which industry sources confirmed last month.

Write to Jeong-Soo Hwang at hjs@hankyung.com
 

Yeonhee Kim edited this article.